National Workshop on Fpga Design for Signal and Image Processing using Xilinx Vivado tools and Zynq 7000 Soc 2019, Kongu Engineering College, National Workshop, Erode, Tamil Nadu, 16th March 2019

  • Category: National Workshop
  • Start Date: 16th March 2019
  • End Date: 16th March 2019
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National Workshop on Fpga Design for Signal and Image Processing using Xilinx Vivado tools and Zynq 7000 Soc 2019

Description

This one day workshop in the area of FPGA Design using Xilinx Vivado and its applications aims to enhance the intellectuals towards the design of digital circuits for real time applications. This workshop aims to play a vital role by focusing the technical designing of signal and image processing applications. The Programming methods can be done in Verilog HDL or VHDL and applied through Xilinx Vivado IDE tool box which will be discussed and hands on training will be provided along with Basis3E and Zynq 7000 SoC processors based implementation methods.

This workshop will help the Academicians, Professionals and Students to explore ways to harness more of digital circuit design logics and signal & image processing applications in FPGA tool for real time applications

Events

NATIONAL WORKSHOP

Workshops

This one day workshop in the area of FPGA Design using Xilinx Vivado and its applications aims to enhance the intellectuals towards the design of digital circuits for real time applications. This workshop aims to play a vital role by focusing the technical designing of signal and image processing applications. The Programming methods can be done in Verilog HDL or VHDL and applied through Xilinx Vivado IDE tool box which will be discussed and hands on training will be provided along with Basis3E and Zynq 7000 SoC processors based implementation methods.

This workshop will help the Academicians, Professionals and Students to explore ways to harness more of digital circuit design logics and signal & image processing applications in FPGA tool for real time applications

Paper Presentation Topics

• 7-Series Architecture Overview
• Vivado Design Flow
• Creating an HDL Design
• Creating and simulating a simple HDL design Using Vivado IDE
• Generate the bit stream and debug the design using Vivado Logic Analyzer
• Design Flow for Image Processing Using Xilinx System Generator
• Creating a FPGA Design using Xilinx System Generator
• Signal and Image Processing Applications Using Zynq SOC

Accommodation

Boarding and lodging will be provided to the selected candidates in the college campus. Accommodation will be provided in the college hostel to the participants only on a chargeable basis. Participants are required to make their own arrangements for those accompanying them, if any.

How to reach Kongu Engineering College, Erode

The college is situated at Perundurai on the National Highway (NH 47) about 80 km from Coimbatore and 20 km from Erode.

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